In recent years, reduction of the voltage of a power supply for a semiconductor integrated circuit device and reduction of the power consumption of the semiconductor integrated circuit device became more and more necessary. U.S. 2003/0042982A1 (JP 2003-69346A) discloses an operational amplifier capable of reducing an idling current of a source-side output transistor by controlling a current flowing through the collector of the source-side output transistor based on an electric potential appearing at the base of a ground-side output transistor.
In addition, JP 2003-258569A discloses a B-class push-pull output circuit in which an input voltage appearing at a signal input terminal is supplied to the bases of third and fourth transistors and, after being shifted by a voltage between the base and emitter of each of the third and fourth transistors, are supplied to first and second transistors composing a complementary push-pull configuration.
In this push-pull output circuit, a current flowing through the collector of the third transistor changes only slightly even if the input voltage and/or the load of push-pull output circuit vary. By using this push-pull output circuit, increases of crossover distortions and current consumptions, which are increases caused by unbalances among base-emitter voltages of the first to fourth transistors, can be suppressed. Here, the base-emitter voltage of a transistor means a voltage appearing between the base and emitter of the transistor.
FIGS. 4A and 4B are circuit diagrams showing a push-pull output circuit employed in the prior art operational amplifier 1. Between a power supply line 2 for supplying a voltage to the operational amplifier 1 and a power supply line 3 serving as a ground line, an NPN-type transistor Q1 and a PNP-type transistor Q2 are provided on both sides of an output terminal 4, being connected to each other through the terminal 4.
Between the bases of the transistors Q1 and Q2, diodes D1 and D2 are connected in series with the polarities of the diodes D1 and D2 oriented in a direction shown in the figure.
On the source side including the transistor Q1, a transistor Q3 is connected between the power supply line 2 and a constant current circuit 5. A transistor Q4 is connected between the power supply line 2 and the base of the transistor Q1. The transistors Q3 and Q4 compose a current mirror circuit 6. The current mirror circuit 6 is a driving circuit for flowing a current to the base of the transistor Q1.
On the ground side (sink side) including the transistor Q2, on the other hand, a transistor Q5 for flowing a current to the base of the transistor Q2 is connected between the base of the transistor Q2 and the power supply line 3. A resistor 7 is connected between the base and emitter of the transistor Q5. It is to be noted that a load 8 is connected to the output terminal 4.
The operational amplifier 1 is designed based on a current supplied by the current mirror circuit 6 to the base of the transistor Q1 or a current generated by the constant current circuit 5 for an assumed case in which a current flowing through the load 8 reaches a maximum value. In the operational amplifier 1 designed in this way, a wasteful current flows to the base of the transistor Q1 when the current flowing through the load 8 decreases.
If the operational amplifier 1 is designed by assuming that the maximum output current is −40 mA and the minimum value of the direct-current gain hFE of the transistor Q1 is 20, for example, the current value of the constant current circuit 5 needs to be set at least 2 mA. Thus, a current of at least 2 mA always continues to flow to the base of the transistor Q1 even if no load is connected.